Explanation
Each I/O communication technique functions according to the following mechanisms:
A. Programmed I/O → 1: The CPU remains in a continuous polling loop (busy-waiting) to check the status register of the I/O device until it is ready for data transfer.
B. Interrupt-Driven I/O → 2: The CPU initiates the I/O command and continues other work; the I/O module issues an asynchronous interrupt signal to notify the CPU when it is ready to transfer data.
C. DMA (Direct Memory Access) Controller → 3: Transfers blocks of data directly between external devices and main memory without continuous involvement of the CPU, avoiding CPU intervention during high-speed data transfers.
D. Double Buffering → 4: Uses two internal memory buffers so that while one buffer is being filled by the I/O device (producer), the CPU/process can read data from the second buffer (consumer), decoupling production and reading speeds.
Therefore, the correct mapping is A-1, B-2, C-3, D-4.
