MCA Entrance Previous Year Question Bank

List-I

A. User-Level Threads

B. Kernel-Level Threads

C. Many-to-One Model

D. One-to-One Model

List-II

1. Kernel handles all management; context switches require traps

2. Managed via a library in user space without kernel awareness

3. Many user threads map to one kernel thread; block risk high

4. Each user thread maps to its own individual kernel target

List-I (Scheduler Component)

A. Job Queue

B. Ready Queue

C. Device Queue

D. Medium-Term Scheduler

List-II (Functional Focus)

1. Holds all processes residing in main memory waiting to run

2. Holds the set of all processes currently inside the system

3. List of processes waiting for a specific I/O hardware device

4. Swaps processes out of RAM to reduce multiprogramming

List-I (PCB Attribute)

A. Program Counter

B. PID

C. CPU Registers

D. Open File List

List-II (Purpose)

1. Unique integer ID assigned to identify the process

2. Tracks the memory address of the next execution step

3. Stores accumulators and stack pointers during interrupt stops

4. Tracks files currently allocated to this specific process

List-I (Transition)

A. New -> Ready

B. Ready -> Running

C. Running -> Waiting

D. Running -> Ready

List-II (Triggering Event)

1. The short-term scheduler selects the process

2. Long-term scheduler admits the process to the ready queue

3. The process issues an I/O block request

4. The allocated clock time quantum expires

List-I (Virtualization Element)

A. Type-1 Hypervisor

B. Type-2 Hypervisor

C. Para-virtualization

D. Full Virtualization

List-II (Deployment Layer)

1. Runs directly on bare metal physical server hardware

2. Runs as an application layer over a host OS

3. Requires guest OS modification to make explicit hypercalls

4. Unmodified guest OS runs seamlessly via binary translation

List-I (Interrupt Aspect)

A. Polling

B. Vectored Interrupt

C. Interrupt Service Routine

D. Non-Maskable Interrupt

List-II (System Resolution)

1. Fast, automatic jump to a dedicated memory routing table

2. Software loop queries every device sequentially to find source

3. Code block executed to clear specific hardware requests

4. Critical hardware signal that cannot be delayed by the CPU

List-I (Operation Invocation)

A. printf()

B. write()

C. Mode Switch

D. Context Switch

List-II (Internal Mechanism)

1. Standard C library wrapper function running in user space

2. Direct execution of software interrupt to access device driver

3. Transition of CPU execution state from user space to kernel

4. Changing CPU focus from one thread/process context to another

List-I (Microkernel Interaction)

• A. Message Passing

• B. Context Switching Overhead

• C. Modularity Level

• D. Subsystem Failure

List-II (Architectural Reality)

1. Primary mechanism for IPC between decoupled user modules

2. Higher frequency due to switching between user and kernel spaces

3. Extremely high; components can be modified without rebuilding

4. Isolated; a file system crash does not halt the entire kernel

List-I (Boot Step)

A. BIOS / UEFI

B. POST

C. Bootstrap Loader

D. init / systemd

List-II (Operational Execution Duty)

1. Locates and reads the Master Boot Record (MBR) into memory

2. Executes initial hardware diagnostics and tests memory blocks

3. Small program in ROM that loads the full OS kernel into RAM

4. Root process that spawns all user-level daemons and shells

List-I (Hardware Feature)

A. Timer Register

B. Base and Limit Registers

C. Memory-Mapped I/O isolation

D. Interrupt Vector Table

List-II (Prevention / Protective Action)

1. Prevents users from accessing device controllers directly

2. Prevents an infinite loop from hogging the CPU

3. Prevents a user program from altering kernel structures

4. Safeguards process boundaries by restricting address access