CUET PG 2026 — operating system os PYQ

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Question

CUET PG 2026 — operating system os PYQ

CUET PG | operating system os | 2026

Assertion (A): A Translation Lookaside Buffer (TLB) speeds up virtual-to-physical address translation.

Reason (R): TLB is a high-speed associative hardware memory cache situated inside or close to the processor.

Choose the correct answer:

Explanation

Assertion (A) is True: The primary purpose of a Translation Lookaside Buffer (TLB) is to cache recent virtual-to-physical address translations, which significantly speeds up the memory access process by avoiding page table walks in main memory.
Reason (R) is True: A TLB is implemented as a special, small, high-speed associative hardware memory cache located within or very close to the CPU (such as inside the MMU).
Correct Explanation: Because the TLB is a high-speed associative hardware cache situated close to the processor, it can quickly look up translations, making Assertion (A) correct. Therefore, Reason (R) is the correct explanation of Assertion (A).