Consider the following circuit.

How many minimum numbers of two inputs NAND gates are required to design the above circuit?
Explanation
As per the question, we need to create a NOR gate (Question Diagram) using NAND gates.
The boolean expression for NAND is undefined
The boolean expression for NOR is undefined
So, using the above boolean expression, the following is the possible diagram:

Explanation
As per the question, we need to create a NOR gate (Question Diagram) using NAND gates.
The boolean expression for NAND is undefined
The boolean expression for NOR is undefined
So, using the above boolean expression, the following is the possible diagram:
