NIMCET 2022 — Computer PYQ

To identify the gate, we examine the behavior of the output $Y$ when one input $A$ is held at a logic Low ($0$).

Let's test the gates using their Boolean expressions:

1. AND Gate: $Y=A\cdot B$. If $A=0$, then $Y=0\cdot B=0$. (Output is Low)

2. OR Gate: $Y=A+B$. If $A=0$, then $Y=0+B=B$. (Signal is enabled/passed, not inhibited to a fixed High)

3. NOR Gate: $Y=\overline{A+B}$. If $A=0$, then $Y=\overline{0+B}=\overline{B}$. (Output depends on B)

4. NAND Gate: $Y=\overline{A\cdot B}$. If $A=0$, then $Y=\overline{0\cdot B}=\overline{0}=1$.

Since the output is fixed at High ($1$) regardless of the other input when a Low ($0$) is applied, the gate is a NAND gate.

Detailed Explanation

• Inhibition: In logic gates, a gate is "inhibited" when one input forces the output to a fixed state, preventing any other signal from passing through.

• NAND Logic: The characteristic of a NAND gate is that if any input is Low ($0$), the output is guaranteed to be High ($1$). This effectively "blocks" or inhibits any signal on the other inputs from reaching the output in its original or inverted form.

• Comparison: In an AND gate, a Low input inhibits the output to Low. In a NAND gate, a Low input inhibits the output to High.